chu2277 rohs compliant ref. dschu22771074 -15-mar.-01 1/ 6 specifications subject to change without notice united monolithic semiconductors s.a.s. route dpartementale 128 - b.p.46 - 91401 orsay cede x france tel. : +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 33 03 09 w-band multifunction multiplier / mpa gaas monolithic microwave ic description the chu2277 is a w-band monolithic multifunction which integrates a frequency multiplier, a four-stage amplifier and a power divider. the frequency multiplier is based on an active transistor and allows to operate at low input level with a reduced power consumption. this chip provides two outputs at 77ghz, the main one is for the transmission path and the auxiliary one for the receiving mixer (s) lo signal. all the active devices are internally self biased. this chip is compatible with automatic equipment for assembly. the circuit is manufactured with the phemt process : 0.15m gate length, via holes through the substrate, air bridges and electron beam gate lithography. it is available in chip form. main features wide operating frequency range low input power : 5dbm typical high output power (out1) auxiliary output power (out2) low am noise high temperature range on-chip self biasing automatic assembly oriented low dc power consumption chip size : 4.65 x 1.6 x 0.1mm x2 out1 out2 in +v -v w-band multifunction block-diagram 0 2 4 6 8 10 12 14 16 18 20 75 75,5 76 76,5 77 77,5 78 78,5 79 output frequency (ghz) output power (dbm) typical output power characteristic pin = 7dbm (on wafer measurement) main characteristics tamb = +25c symbol parameter min typ max unit f_in input frequency 38 38.5 ghz f_out output frequency 76 77 ghz p_out1 main output power 13 dbm p_out2 auxiliary output power 10 dbm esd protections : electrostatic discharge sensitive device observe handling precautions ! out2 out1
chu2277 w-band multiplier/mpa ref. dschu22771074 -15-mar.-01 2/ 6 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 electrical characteristics full operating temperature range, used according t o section typical assembly and bias configuration symbol parameter min typ max unit f_in input frequency 38 38.5 ghz f_out output frequency 76 77 ghz p_in input power 0 5 12 dbm p_out1 output power (out1) (1) 11 13 16 dbm p_out2 output power (out2) (1) 8 10 13 dbm fin_rej fundamental rejection (dbc/pout1(2fin)) 45 55 dbc s_rej spurious rejection (dbc/pin) 12.75 ghz 25.5 ghz 38.25 ghz 51 ghz 63.75 ghz 76.5 ghz 89.25 ghz 102 ghz 40 40 35 50 40 15 40 50 50 50 45 60 50 20 50 60 dbc an amplitude noise @ 1khz (ssb) amplitude noise @ 10khz (ssb) amplitude noise @ 100khz (ssb) amplitude noise @ 200khz (ssb) amplitude noise @ 1mhz (ssb) -137 -145 -151 -153 -157 -132 -140 -146 -148 -152 dbc/hz vswr_in vswr at input port (50 w ) 2:1 2.5:1 +v positive supply voltage (2) 4.4 4.5 4.6 v +i positive supply current 180 240 ma -v negative supply voltage (2) -4.6 -4.5 -4.4 v -i negative supply current 14 20 ma top operating temperature range -40 100 c (1) defined on load vswr 1.5:1. (2) negative supply voltage must be applied at leas t 1us before positive supply voltage.
w-band multiplier/mpa chu2277 ref. dschu22771074 -15-mar.-01 3/ 6 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 absolute maximum ratings (1) symbol parameter values unit p_in input power (2) 13 dbm +v positive supply voltage 5 v -v negative supply voltage -5 v +i positive supply current 250 ma -i negative supply current 20 ma tstg storage temperature range -55 to +155 c (1) operation of this device above anyone of these parameters may cause permanent damage. (2) duration < 1s chip mechanical data and pin references 1 2 3 4 5 6 7 8 9 10 11 12 unit = m external chip size (layout size + dicing streets) = 4650 x 1600 35 chip thickness = 100 +/- 10 hf pads (2, 5,8) = 68 x 118 dc/if pads = 100 x 100 pin number pin name description 1,3,4,6,7,9 ground : should not be bonded. if required, please ask for more information. 11 ground (optional) 2 in input port 5 out1 main output 8 out2 auxiliary output 10 +v positive supply voltage 12 -v negative supply voltage
chu2277 w-band multiplier/mpa ref. dschu22771074 -15-mar.-01 4/ 6 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical assembly and bias configuration l_in -v +v -strip line dc lines >= 120pf >= 120pf l_out1 1 2 3 4 5 6 7 8 9 10 11 12 l_out2 -strip line -strip line this drawing shows an example of assembly and bias configuration. all the transistors are internally self biased. an external capacitor is recommended for the positive and negative supply voltages. for the rf pads the equivalent wire bonding inducta nce (diameter=25m) have to be according to the following recommendation. port equivalent inductance (nh) wire length (mm) (1) in (2) l_in = 0.32 0.4 out1 (5) l_out1 = 0.32 0.4 out2 (8) l_out2 = 0.32 0.4 (1) this value is the total length including the ne cessary loop from pad to pad. for a micro-strip configuration a hole in the subst rate is necessary for chip assembly.
w-band multiplier/mpa chu2277 ref. dschu22771074 -15-mar.-01 5/ 6 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 as the connections at 77ghz (between mmic and mmic or between mmic and external substrate) are critical, the transition ma tching network is split into two parts: one on mmic and one on the external substrat e. this choice allows to do, for out2 port, a direct connection between mmics. f or a connection to an external substrate a network is proposed on soft su bstrate for out1 and out2 ports. the following drawings gives the dimensions for a duroid substrate (thickness=0.127mm, e r=2.2). bonding area proposed matching network for a 50 w transition between out1 and a -strip line on duroid substrate bonding area proposed matching network for a 50 w transition between out2 and a -strip line on duroid substrate.
chu2277 w-band multiplier/mpa ref. dschu22771074 -15-mar.-01 6/ 6 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 ordering information chip form : chu2277-99f/00 information furnished is believed to be accurate an d reliable. however united monolithic semiconductors s.a.s. assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by impli cation or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and re places all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or s ystems without express written approval from united monolithic semiconductors s.a.s.
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